Memory systems are well known in which a functional unit known as an ECC unit is employed to detect errors in data words which have been stored in an associated memory of the system. An ECC unit operates by reading the stored data, computing a checksum from this data and comparing the computed checksum with stored parity information. An ECC unit is also able to correct detected errors. The detection and correction capability of an ECC unit is usually described by an expression of the form ‘detecting N-bit and correcting M-bit’, used in relation to the actual word size processed by the ECC unit. N and M are integers indicating the number of errors in a word which are respectively detected and corrected by the ECC unit. The most usual values of N and M are 2 (for detected errors) and 1 (for corrected errors) for data words having a size of either 32 or 64 bits. An ECC unit identified by such a designation in which N is 2 and M is 1 is one that is guaranteed to detect any data word having a maximum of two incorrect bits and having the capability to correct any single bit error in such a word. Instances of errors having more than two incorrect bits may also be detected by such a unit. However, there is no guarantee of such detection, since the multiplicity of changed bits might accidentally match the checksum information. The automatic correction of more than M incorrect bits is usually impossible without risking the integrity of the memory system.
When incorrect data words are corrected by an ECC unit, the errors involved are not visible to any application which subsequently uses the data which included the errors.